Mounting of extremely small multifunctional semiconductor packages such as a BOA (ball grid array) and CSP (chip size package) on printed wiring boards is often carried out by means of solder bumps. When carrying out such mounting, solder bumps are previously formed atop the electrodes of a package, and the package is disposed so that the solder bumps contact the portions to be soldered (lands) of a printed wiring board. The printed wiring board and the package are then heated in a heating apparatus such as a reflow furnace and the bumps are melted to solder the package to the printed wiring board and to provide electrical continuity between the two member.
Solder bumps are also utilized for mounting of a bare chip to a printed wiring board. Such mounting is called DCA (direct chip attach) or flip chip method. In this method, solder bumps are formed atop the electrodes of a chip. Mounting of a chip on a printed wiring board by DCA Or also be carried out by wire bonding or TAB (tape automated bonding), but flip chip mounting enables higher density mounting as well as mounting with high productivity.
With a QFP (quad flat package), SOIC (small outline integrated circuit) and the like, connection of electrodes of a chip and a substrate (interposer) on which the chip is mounted has in recent years increasingly been carried out by flip chip connection using solder bumps instead of wire bonding, which was primarily used in the past. In the same manner as flip chip mounting, this connection method utilizes solder bumps formed on the electrodes of a chip.
Wire bonding uses expensive gold wire, and even though operation is automated and performed at a high speed, electrodes are connected one by one, so the operation takes an extended period of time. In addition, as the electrode density increases with an increase in the performance of chips, short circuits due to contact between wires has become unavoidable. In contrast, flip chip mounting or connection can be rapidly carried out by disposing a chip such that solder bumps formed on the chip come into contact with portions to be soldered of a printed wiring board or electrodes of a substrate and melting the solder bumps. In addition, short circuits due to contact of wires does not occur even if the electrode density increases.
Formation of solder bumps on electrodes of a package or a chip is typically carried out using solder balls or a solder paste.
A conventional solder alloy used for forming solder bumps was a Sn—Pb based solder alloy. A Sn—Pb based solder alloy has excellent solderability so that it can perform highly reliable soldering with minimized soldering defects even when it is used for soldering with minute solder bumps.
However, when printed wiring boards which are difficult to reuse are disposed of by burial, pollution of underground water with lead caused by contact of printed wiring boards with acid rain has become a problem. For this reason the use of Pb-containing solder alloys has come to be restricted on a worldwide scale. Therefore, development of lead-free solder alloys which do not contain Pb is promoted.
Lead-free solder alloys typically contain Sn as a main constituent element with one or more alloying elements such as Ag, Bi, Cu, Sb, In, Ni, and Zn added thereto. For example, binary alloys such as Sn—Cu, Sn—Sb, Sn—Bi, Sn—Zn, and Sn—Ag and various types of ternary or higher alloys having other elements added to these binary alloys have been proposed as lead-free solder alloys.
In general, the solderability of a Sn-based lead-free solder alloy is inferior compared to a conventional Sn—Pb based solder alloy. Among these lead-free solder alloys, Sn—Ag alloys have better solderability compared to other binary alloys, and they are also better with respect to other properties such as brittleness and alterations with time.
In so-called mobile electronic equipment such as mobile telephones, notebook computers, and digital cameras, soldered joints inside the electronic equipment need to have excellent impact resistance. Mobile electronic equipment can be subjected to impacts when dropped, and if soldered joints inside the electronic equipment break away as a result of such an impact, the equipment can no longer perform its intended function. One of major causes of malfunctions when mobile electronic equipment is dropped is breakaway of soldered joints. Lead-free solder alloys have the tendency to have lower impact resistance to dropping compared to Pb—Sn based solder alloys.
In particular, in BGA's and flip chip connection, impacts cannot be absorbed by lead wires as is the case with connection employing lead wires, and impacts are directly applied to soldered joints. Therefore, they are more sensitive to impacts caused by dropping. In addition, as chips become increasingly multifunctional, the electrode density of chips is increasing; and accordingly the size of solder bumps formed on electrodes is becoming minute. In light of these circumstances, it is desired that the impact resistance to dropping of lead-free solder alloys be improved in haste.
In JP 2002-307187A1 (Patent Document 1), a lead-free solder alloy comprising, in mass percent, 1.0-3.5% Ag, 0.1-0.7% Cu, 0.1-2.0% In, optionally one or more of 0.03-0.15% Ni, 0.01-0.1% Co, and 0.01-0.1% Fe, and a remainder essentially of Sn and unavoidable impurities is described as having good heat cycle resistance. The solder alloys shown in the examples all contain 3.0% Ag. There is no description concerning impact resistance to dropping.
In JP 2002-239780A1 (Patent Document 2), a lead-free solder alloy comprising, in mass percent, Ag: 1.0-2.0%, Cu: 0.3-1.5%, optionally one or more of Sb; 0.005-1.5%, Zn; 0.05-1%, Ni: 0.05-1%, and Fe: 0.005-0.5%, and a remainder of Sn and impurities is described as having excellent joint reliability and impact resistance to dropping.
In JP 2005-46882A1 (Patent Document 3), a solder alloy comprising, in mass percent, 0.1-5% Cu, 0.1-10% In, at least one element selected from Fe, Ni, and Co in a total amount of 0.002-0.05%, optionally 0.1-1.5% Ag, and a remainder of Sn and unavoidable impurities is described as having improved reliability with respect to fracture of joints due to impacts from dropping. The solder alloys shown in the examples all contain at least 1% In.
The solder alloys disclosed in Patent Document 1, such as a Sn-3.0% Ag-0.5% Cu-0.5% In-0.05% Ni solder alloy, for example, have low impact resistance to dropping. The Sn—Ag—Cu based lead-free solder alloys described in Patent Document 2 have insufficient impact resistance to dropping when used in the form of minute solder bumps.
The Sn—(Ag)—Cu—In—Ni/Co solder alloys described in Patent Document 3 contain a considerably large amount of In, and they have the problem of yellowing of solder. Quality inspection of minute solder bumps formed atop a substrate or chip is generally carried out by optical recognition. Heat treatment called burn-in may be applied to the substrate or chip before quality inspection. Yellowing of solder may interfere with optical recognition during quality inspection and be a cause of recognition errors. If errors occur during quality inspection of solder bumps, the reliability of soldering is markedly decreased. Moreover, In (indium) is easily oxidized, so a solder alloy containing a large amount of In increases the amount of oxidation during heating at the time of solder bump formation or soldering, and a large amount of voids form in the solder bumps or soldered joints, which has an adverse effect on impact resistance to dropping.